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TECHNICAL DATA
DOT MATRIX LIQUID CRYSTAL DISPLAY CONTROLLER & DRIVER
FEATURES
* Internal Memory Character Generator ROM: 8320 bits Character Generator RAM: 512 bit Display Data RAM: 80 x 8 bits for 80 digits
KK44780
FUNCTION
* Character type dot matrix LCD driver & controller * Internal driver: 16 common and 40 segment signal output * Display character format: 5 x 7 dots + cursor, 5 x 10 dots + cursor * Easy interface with a 4-bit or 8-bit MPU * Display character pattern: 5 x 7 dots format: 192 kinds, 5 x 10 dots format: 32 kinds * The special character pattern can be programmable by Character Generator RAM directly * A customer character pattern can be programmable by mask option * Wide range of instruction function: Display clear, Cursor home, Display ON/OFF, Display shift Cursor ON/OFF, Display character blink, Cursor shift
* Internal automatic reset circuit at power ON * Internal oscillation circuit * Power Supply Voltage: +5V 10% * LCD Driving Voltage for display: 0 ~ -5V(V5) * Duty factor selection (sselected by programs) 1/8 duty: 5 x 7 dots format 1 line, 1/11 duty: 5 x 10 dots format 1 line 1/16 duty: 5 x 7 dots format 2 line * Bare chip available * Pin-to-Pin replacement for KS0066, KK44780, SED1278
DESCRIPTION
The KK44780 is a dot matrix liquid crystal display controller & driver LSI that displays alphanumerics, characters and symbols. It drives dot matrix LCD under microcomputer control. All functions needed for dot matrix LCD drive are internally provided on one chip.
ODERING INFORMATION
Type KK44780 - 00 KK44780 - 01 KK44780 - XX English English CGROM Numberal Numberal Custom font (XX - ROM code) Russian Japanese
ABSOLUTE MAXIMUM RATINGS
Characteristic Power Supply Voltage Driver Supply Voltage Input Voltage Operating Temperature Storage Temperature Symbol VDD V1 ~ V 5 VI Ta Tstg Value - 0.3 ~ 7.0 VDD - 13.5 ~ VDD + 0.3 -0.3 ~VDD + 0.3 - 20 ~ + 75 - 55 ~ + 125 Unit V V V o C o C
Notes: Must keep the relation of VDD V1 V2 V3 V4 V5
1
KK44780
BLOCK DIAGRAM
Power supply for LCD Drive V1 V2 V3 V4 V5
5 5
Par allel/ Ser ial Data conversion Circuit
Busy Flag
Char acter Gener at or ROM 8320 bit s
Char act er Gener ator RAM 512 bits
Cursor Blink Cont rol Circuit
DB0~DB3 4 DB4~DB7 4
8 8
I/ O Buf fer R/ W RS E
8
8
SEG1
Data Register
7
8
Segment to 40 - bit 40 - bit SEG40 Shif t 40 L at ch 40 Sign al 40 Dr iver Regist er Cir cuit
7
I nstruct ion Register 8
I nstruct ion Decoder
Display Data RAM 80 x 8 bit s
D
7
7
7
Address Counter
7
16 - bit Shif t 16 Register
Common COM16 Sign al 16 Driver
COM1 to
OSC1 OSC2 Timing Gener at ion Circuit
CLK 1 CLK 2 M
VDD VSS
2
KK44780
ELECTRICAL CHARACTERISTICS (Ta = 25oC, VDD = +5V, VSS = 0V unless otherwise specified)
Characteristic Operating Voltage Operating Current (*1) Symbol VDD IDD Test Condition Applicable Terminals Min 4.5 Internal oscillation or external clock fOSC = 270KHz E, DB0 ~ DB7, 2.2 R/W, RS OSC1 VDD-1.0 E, DB0 ~ DB7, -0.3 R/W, RS OSC1 -0.2 DB0 ~ DB7 2.4 CLK1, CLK2, M, D 0.9VDD DB0 ~ DB7 CLK1, CLK2, M, D COM1 ~ COM16 0.35 Typ Max 5.5 0.6 Unit V
HIGH Input Voltage
VIH
VDD VDD 0.6 1.0
V
LOW Input Voltage
VIL
V
HIGH Output Voltage LOW Output Voltage Driver Voltage Descending Input Leakage Current Input LOW Current Frequency( *1) External Duty Clock Rise time Fall time Internal Clock Frequency(*1) Ceramic Resonator Oscillation Frequency (*1) LCD Driving Voltage (*2)
VOH VOL VCOM VSEG ILKG IIL fEC DUTY tR tF fOSC1 fOSC2
IOH = -0.205 mA IOH = -40A IOL = 1.2mA IOL = 40A IO = 0.1mA
V 0.4 0.1VDD 1.0 1.0 1 -250 350 55 0.2 0.2 350 255 V V
SEG1 ~ SEG40 VIN =0V ~ VDD E VCC = 5V (test pull RS, R/W, DB0 ~ DB7 up R)
-1 -50 125
-125 250 50
A A KHz % s s KHz
OSC1
46
Rf = 91K 2%
OSC1, OSC2
190 245
270 250
VLCD1 VLCD2
VDD - V5 1/5 bias 1/4 bias
V1 ~ V5
4.6 3.0
10.0 10.0
V
Notes: *1).
Oscillation circuit
3
KK44780
Resistor circuit
OS C1 Rf Rf: 91k+ 2% OS C2
External clock circuit
OS C1 OS C2
Frequency input
open
*2). Input the voltage listed in table below to V1 ~ V5
Duty Bias Power supply V1 V2 V3 V4 V5 VDD - VLCD/4 VDD - VLCD/2 VDD - VLCD/2 VDD - 3VLCD/4 VDD - VLCD VDD - VLCD/5 VDD - 2VLCD/5 VDD - 3VLCD/5 VDD - 4VLCD/5 VDD - VLCD 1/8, 1/11 1/4 1/16 1/5
*VLCD is the LCD driving voltage, refer to the initial set of the instruction code.
AC CHARACTERISTICS (VDD = 5V, VSS = 0V, Ta = 25oC) (1) Write mode (Writing data from MPU to KK44780)
Characteristic E Cycle Time E Rise Time E Fall Time E Pulse Width (High, Low) R/W and RS Set-up Time R/W and RS Hold Time Data Set-up Time Data Hold Time Symbol tC tR tF tW tSU1 tH1 tSU2 tH2 Test pin E E E E R/W, RS R/W, RS DB0 ~ DB7 DB0 ~ DB7 220 40 10 60 10 Min 500 25 25 Typ Max Unit ns ns ns ns ns ns ns ns
4
KK44780
RS
VIH1 VIL1 tSU1
VIH1 VIL1 tH1
R/ W VIL1 tH1 tW VIL1
E
VIL1
tR
tSU2
tH2
VIH1 DB0 ~ DB7 VIL1 tC Valid Data
VIH1 VIL1
(2) Read mode (Reading data from KK44780 to MPU)
Characteristic E Cycle Time E Rise Time E Fall Time E Pulse Width (High, Low) R/W and RS Set-up Time R/W and RS Hold Time Data Output Delay Time Data Hold Time Symbol tC tR tF tW tSU1 tH1 tD tH2 Test pin E E E E R/W, RS R/W, RS DB0 ~ DB7 DB0 ~ DB7 20 220 40 10 120 Min 500 25 25 Typ Max Unit ns ns ns ns ns ns ns ns
5
KK44780
RS
VIH1 VIL1 tSU
VIH1 VIL1 tH VIL1 tW tF VIL1 tR tD tDH VIL1 tH
R/ W
VIH1 E VIL1
VIH1 DB0 ~ DB7 VIL1 tC Valid Data
VIH1 VIL1
(3) Interface mode with HD44100, KS0065
Characteristic Clock Pulse Width High Clock Pulse Width Low Data Set-up Time Data Hold Time Clock Set-up Time M Delay Time Symbol tWCKH tWCKL tSU tDH tCSU tDM Test pin CLK CLK D D CLK M Min 800 800 300 300 500 -1000 1000 Typ Max Unit ns ns ns ns ns ns
0.9VDD CLK1 tWCKH tCSU CLK2 0.1VDD tCSU 0.9VDD
0.9VDD
tWCKH 0.9VDD 0.1VDD tWCK1 0.1VDD
D
0.9VDD 0.1VDD tSU
0.9VDD 0.1VDD tDM
M
0.9VDD tDM
6
KK44780
TERMINAL DESCRIPTION
Pin VDD VSS V1 - V5 SEG1- SEG40 COM1- COM16 OSC1 OSC2 INPUT/OUTPU T Power Negative Supply Voltage Segment output Common output Oscillator Name Operating Voltage DESCRIPTION For logical circuit (+5V 10%) 0V(GND) Bias voltage level for LCD driving Segment signal output for LCD driving Common signal output for LCD driving Both pin connected to Rf resistor or ceramic resonator for internal oscillator circuit. In case of external frequency use only, the frequency is input to OSC1 terminal. Clock output terminal for the serially transferred data to be latched to the driver. Clock output terminal used when D terminal data output shifts the inside of the driver. The alternating signal to convert LCD drive waveform to AC. Character pattern data, which is corresponding to each common signal, is supplied to driver serially. High Selection Low Non selection Start anable signal to read or write the data R/W signal input is used to select the read/write mode High Read mode Low Write mode Register selection input High Data register (for read and write) Low Instruction register (for write), Busy flag, address counter (for read) Used for data transfer between the MPU and KK44780. These terminals are for data bus with bidirectional three-state. Initial 4 bit (DB0-DB3) are not used during 4 bit operation (DB7 can be used as a busy flag) MPU INTERFACE Power Supply
Output Output Input Output
LCD LCD Resistor or Ceramic Resonator
CLK1 CLK2 Output
Data latch clock Data shift clock
HD44100, KS0065, IZ0065
M
D
Alternated signal for LCD driver output Display data interface
E R/W
Input
Enable Read/Write
RS
Register select
DB0 - DB7
Input/Output
Data interface
7
KK44780
CONTROL and DISPLAY COMMANDS
Command DISPLAY CLEAR RETURN HOME ENTRY MODE SET RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 L L L L L L L L L L L L L L L L L L L L L L L H L H I/D H X SH Execution time
(fOSC=250KHz) Remark
1.64 ms 1.64 ms 40s
Cursor move to first digit *I/D: set cursor move direction
I/D H L H L Increase Decrease Display is shifted Display is not shifted Display on Display off Cursor on Cursor off Blinking on Blinking off Display shift Cursor move Right shift Left shift 8 bits interface 4 bits interface 2 line display 1 line display 5x10 dots 5x7 dots
*SH: Specifies shift of display
SH
DISPLAY ON/OFF
L
L
L
L
L
L
H
D
C
B
40s
*Display
D H L H L H L H L H L H L H L H L
*Cursor
C
*Blinking
B
SHIFT
L
L
L
L
L
H
S/C R/L X
X
40s
SC
R/L
SET FUNCTION
L
L
L
L
H
DL
N
F
X
X
40s
DL
N
F
SET CG RAM ADDRESS SET DD RAM ADDRESS READ BUSY FLAG & ADDRESS
L L L
L L H
L H
H
CG RAM address (corresponds to cursor address) DD RAM address
40s 40s 0s
CG RAM Data is sent and received after this setting DD RAM Data is sent and received after this setting
BF H L Busy Ready
BF Address Counter used for Both DD & CG RAM address
WRITE DATA READ DATA
H H
L H
Write Data Read Data
46s 46s
-Reads BF indication internal operating is being performed. -Reads address counter contents Write data DD or CG RAM Read data from DD or CG RAM
Note: X - Don't care.
8
KK44780
When KS0065, HD44100 is externally connected to the KK44780, you can increase the number of display digits up to 80 characters.
LCD Panel
COM1~COM16 DL2 D R1 DL1 D R2 F CS CL 1 BT1510 SH L 1 CL 2 SH L 2 M VSS VD D V6 V5 V4 V3 V2 V1 VE E
SEG1~SEG40
SC1 ~ SC40
SC1 ~ SC40 DL2 D R1 DL1 D R2 FCS BT1510 C L 1 SH L 1 CL 2 SH L 2 M VSS VD D V6 V5 V4 V3 V2 V1 VE E
SC1 ~ SC40
D OSC1
OSC2
DL2 D R1 DL1 D R2 FCS BT1510 C L 1 SH L 1 CL 2 SH L 2 M VSS VD D V6 V5 V4 V3 V2 V1 VE E
T1578
KK44780
CLK 1 CLK2 VDD V1 VSS M
VDD
V1
IZ0065
V2
IZ0065
V3 V4
IZ0065
V2
APPLICATION CIRCUIT
V3
V4
DB0 ~ DB7
To MPU
V5
V5
GND or other voltage
V L CD (1/ 5 b i as)
9
KK44780
PAD LAYOUT
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
65 66 67 68 69 37 70 71 72 73 74 75 76 77 78 79 80 36 35 40 39
38
(0,0)
34 33
KK44780 P BT 1578 AD DIAGRAM
32 31 30 29 28 27 26 25
Chip size : 4000 x 4900 P size : 120 x 120 ad Unit : m
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PAD LOCATION (Unit: m)
Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Pad Name SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 GND OSC1 OSC2 V1 V2 X -2221 -2041 -1804 -1624 -1444 -1264 -1084 -904 -724 -544 -364 -184 -4 176 35 536 716 896 1076 1256 1436 1616 1920 2100 2299 2299 2299 Y Pad No. Pad Name V3 V4 V5 CL1 CL2 VCC M D RS R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 X 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2188 2008 1812 1632 1436 1256 961 781 601 421 241 61 -119 -299 Y Pad No. Pad Name COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 X -530 -710 -941 -1121 -1301 -1481 -1661 -1841 -2036 -2216 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 Y 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1404 1224 1044 864 684 504 324 144 -36 -216 -396 -576 -756 -936 -1116 -1296
-1830 28 -1830 29 -1830 30 -1830 31 -1830 32 -1830 33 -1830 34 -1830 35 -1830 36 -1830 37 -1830 38 -1830 39 -1830 40 -1830 41 -1830 42 -1830 43 -1830 44 -1830 45 -1830 46 -1830 47 -1830 48 -1830 49 -1830 50 -1830 51 -1552 52 -1372 53 -1192 54
-1012 55 -832 56 -862 57 -472 58 -292 59 -112 60 68 61 248 62 428 63 608 64 788 65 1090 66 1270 67 1830 68 1830 69 1830 70 1830 71 1830 72 1830 73 1830 74 1830 75 1830 76 1830 77 1830 78 1830 79 1830 80 1830
10

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